1 tm file number 4446.3 HGTG30N60B3D 60a, 600v, ufs series n-channel igbt with anti-parallel hyperfast diode the HGTG30N60B3D is a mos gated high voltage switching device combining the best features of mosfets and bipolar transistors. this device has the high input impedance of a mosfet and the low on-state conduction loss of a bipolar transistor. the much lower on-state voltage drop varies only moderately between 25 o c and 150 o c. the igbt used is the development type ta49170. the diode used in anti-parallel with the igbt is the development type ta49053. the igbt is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: ac and dc motor controls, power supplies and drivers for solenoids, relays and contactors. formerly developmental type ta49172. features 60a, 600v, t c = 25 o c 600v switching soa capability typical fall time. . . . . . . . . . . . . . . . . 90ns at t j = 150 o c short circuit rating low conduction loss hyperfast anti-parallel diode packaging jedec style to-247 symbol ordering information part number package brand HGTG30N60B3D to-247 g30n60b3d note: when ordering, use the entire part number. g c e c e g intersil corporation igbt product is covered by one or more of the following u.s. patents 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 data sheet november 2000 caution: these devices are sensitive to electrostatic discharge; follow proper esd handling procedures. 1-888-intersil or 321-724-7143 | intersil and design is a trademark of intersil corporation. | copyright ?intersil corporation 2000
2 absolute maximum ratings t c = 25 o c, unless otherwise speci?d HGTG30N60B3D units collector to emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .bv ces 600 v collector current continuous at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c25 60 a at t c = 110 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c110 30 a average diode forward current at 110 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i ec(avg) 25 a collector current pulsed (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i cm 220 a gate to emitter voltage continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ges 20 v gate to emitter voltage pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gem 30 v switching safe operating area at t j = 150 o c (figure 2) . . . . . . . . . . . . . . . . . . . . . . . ssoa 60a at 600v power dissipation total at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 208 w power dissipation derating t c > 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.67 w/ o c operating and storage junction temperature range . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 o c maximum lead temperature for soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l 260 o c short circuit withstand time (note 2) at v ge = 12v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t sc 4 s short circuit withstand time (note 2) at v ge = 10v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t sc 10 s caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. notes: 1. pulse width limited by maximum junction temperature. 2. v ce(pk) = 360v, t j = 125 o c, r g = 3 ?. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units collector to emitter breakdown voltage bv ces i c = 250 a, v ge = 0v 600 - - v collector to emitter leakage current i ces v ce = bv ces t c = 25 o c - - 250 a t c = 150 o c--3ma collector to emitter saturation voltage v ce(sat) i c = i c110 , v ge = 15v t c = 25 o c - 1.45 1.9 v t c = 150 o c - 1.7 2.1 v gate to emitter threshold voltage v ge(th) i c = 250 a, v ce = v ge 4.2 5 6 v gate to emitter leakage current i ges v ge = 20v - - 250 na switching soa ssoa t j = 150 o c, r g = 3 ?, v ge = 15v, l = 100 h v ce (pk) = 480v 200 - - a v ce (pk) = 600v 60 - - a gate to emitter plateau voltage v gep i c = i c110 , v ce = 0.5 bv ces - 7.2 - v on-state gate charge q g(on) i c = i c110 , v ce = 0.5 bv ces v ge = 15v - 170 190 nc v ge = 20v - 230 250 nc current turn-on delay time t d(on)i igbt and diode at t j = 25 o c, i ce = i c110 , v ce = 0.8 bv ces , v ge = 15v, r g = 3 ? , l = 1mh, test circuit (figure 19) -36 - ns current rise time t ri -25 - ns current turn-off delay time t d(off)i - 137 - ns current fall time t fi -58 - ns turn-on energy e on - 550 800 j turn-off energy (note 3) e off - 680 900 j HGTG30N60B3D
3 current turn-on delay time t d(on)i igbt and diode at t j = 150 o c, i ce = i c110 , v ce = 0.8 bv ces , v ge = 15v, r g = 3 ? , l = 1mh, test circuit (figure 19) -32 - ns current rise time t ri -24 - ns current turn-off delay time t d(off)i - 275 320 ns current fall time t fi - 90 150 ns turn-on energy e on - 1300 1550 j turn-off energy (note 3) e off - 1600 1900 j diode forward voltage v ec i ec = 30a - 1.95 2.5 v diode reverse recovery time t rr i ec = 1a, di ec /dt = 200a/ s - 32 40 ns i ec = 30a, di ec /dt = 200a/ s - 45 55 ns thermal resistance junction to case r jc igbt - - 0.6 o c/w diode - - 1.3 o c/w note: 3. turn-off energy loss (e off ) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (i ce = 0a). all devices were tested per jedec standard no. 24-1 method for measurement of power device turn-off switching loss. this test method produces the true total turn-off energy loss. typical performance curves unless otherwise speci?d figure 1. dc collector current vs case temperature figure 2. minimum switching safe operating area electrical speci?ations t c = 25 o c, unless otherwise speci?d (continued) parameter symbol test conditions min typ max units t c , case temperature ( o c) i ce , dc collector current (a) 50 10 0 40 20 30 50 60 v ge = 15v 25 75 100 125 150 v ce , collector to emitter voltage (v) 125 700 75 0 i ce , collector to emitter current (a) 25 50 300 400 200 100 500 600 100 0 150 175 200 225 t j = 150 o c, r g = 3 ? , v ge = 15v, l = 100 h HGTG30N60B3D
4 figure 3. operating frequency vs collector to emitter current figure 4. short circuit withstand time figure 5. collector to emitter on-state voltage figure 6. collector to emitter on-state voltage figure 7. turn-on energy loss vs collector to emitter current figure 8. turn-off energy loss vs collector to emitter current typical performance curves unless otherwise speci?d (continued) f max , operating frequency (khz) 5 i ce , collector to emitter current (a) 1 0.1 10 60 20 40 100 f max1 = 0.05 / (t d(off)i + t d(on)i ) r jc = 0.6 o c/w, see notes p c = conduction dissipation (duty factor = 50%) f max2 = (p d - p c ) / (e on + e off ) t c v ge 110 o c 10v 15v 15v 75 o c 110 o c 75 o c 10v 10 t j = 150 o c, r g = 3 ? , l = 1mh, v ce = 480v v ge , gate to emitter voltage (v) i sc , peak short circuit current (a) t sc , short circuit withstand time ( s) 10 11 12 13 14 15 6 8 10 12 16 20 14 150 200 250 300 350 400 500 t sc i sc 18 450 v ce = 360v, r g = 3 ? , t j = 125 o c 024 v ce , collector to emitter voltage (v) i ce , collector to emitter current (a) 0 25 50 75 6810 150 125 100 175 t c = -55 o c t c = 150 o c pulse duration = 250 s duty cycle <0.5%, v ge = 10v 225 200 t c = 25 o c i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 200 250 300 350 012 0 150 345 100 50 duty cycle <0.5%, v ge = 15v pulse duration = 250 s t c = -55 o c t c = 150 o c t c = 25 o c 67 e on , turn-on energy loss (mj) 5 3 i ce , collector to emitter current (a) 4 2 1 40 20 60 50 30 10 6 0 t j = 25 o c, t j = 150 o c, v ge = 10v r g = 3 ? , l = 1mh, v ce = 480v t j = 25 o c, t j = 150 o c, v ge = 15v i ce , collector to emitter current (a) e off , turn-off energy loss (mj) 0 0.5 50 30 20 40 60 10 1.0 2.5 r g = 3 ? , l = 1mh, v ce = 480v t j = 150 o c, v ge = 10v or 15v t j = 25 o c, v ge = 10v or 15v 2.0 1.5 3.0 3.5 4.0 4.5 HGTG30N60B3D
5 figure 9. turn-on delay time vs collector to emitter current figure 10. turn-on rise time vs collector to emitter current figure 11. turn-off delay time vs collector to emitter current figure 12. fall time vs collector to emitter current figure 13. transfer characteristic figure 14. gate charge waveforms typical performance curves unless otherwise speci?d (continued) i ce , collector to emitter current (a) t di , turn-on delay time (ns) 20 10 30 50 25 30 35 40 45 50 40 55 60 t j = 25 o c, t j = 150 o c, v ge = 10v t j = 25 o c, t j = 150 o c, v ge = 15v r g = 3 ? , l = 1mh, v ce = 480v i ce , collector to emitter current (a) t ri , rise time (ns) 20 0 50 250 200 100 60 10 150 50 40 30 r g = 3 ? , l = 1mh, v ce = 480v t j = 25 o c, t j = 150 o c, v ge = 10v t j = 25 o c, t j = 150 o c, v ge = 15v 20 30 60 10 250 300 50 40 100 200 150 i ce , collector to emitter current (a) t d(off)i , turn-off delay time (ns) t j = 25 o c, v ge = 10v, v ge = 15v t j = 150 o c, v ge = 10v, v ge = 15v r g = 3 ? , l = 1mh, v ce = 480v i ce , collector to emitter current (a) t fi , fall time (ns) 20 30 60 10 40 100 120 50 40 60 80 t j = 150 o c, v ge = 10v and 15v t j = 25 o c, v ge = 10v and 15v r g = 3 ? , l = 1mh, v ce = 480v i ce , collector to emitter current (a) 0 50 100 150 5 78910 6 v ge , gate to emitter voltage (v) 11 200 250 300 4 t c = 150 o c t c = 25 o c pulse duration = 250 s duty cycle <0.5%, v ce = 10v t c = -55 o c q g , gate charge (nc) 0 8 10 6 4 2 050 v ge , gate to emitter voltage (v) v ce = 400v v ce = 600v 150 200 100 12 14 16 v ce = 200v i g (ref) = 1ma, r l = 10 ? , t c = 25 o c HGTG30N60B3D
6 figure 15. capacitance vs collector to emitter voltage figure 16. normalized transient thermal response, junction to case figure 17. diode forward current vs forward voltage drop figure 18. recovery time vs forward current typical performance curves unless otherwise speci?d (continued) v ce , collector to emitter voltage (v) 0 5 10 15 20 25 0 c, capacitance (nf) 2 4 6 8 10 c res frequency = 1mhz c oes c ies z jc , normalized thermal response t 1 , rectangular pulse duration (s) 10 -5 10 -3 10 0 10 1 10 -4 duty factor, d = t 1 / t 2 peak t j = (p d x z jc x r jc ) + t c 10 -1 10 -2 single pulse 10 0 10 -1 10 -2 p d t 1 t 2 0.50 0.05 0.01 0.02 0.10 0.20 i ec , forward current (a) v ec , forward voltage (v) 3.0 2.0 2.5 1.5 1.0 0.5 0 0 25 50 75 100 125 3.5 4.0 150 175 200 100 o c 25 o c -55 o c 30 40 20 0 t, recovery times (ns) i ec , forward current (a) 230 1 10 10 20 50 5 t rr t a t b t c = 25 o c, di ec /dt = 200a/ s HGTG30N60B3D
7 handling precautions for igbts insulated gate bipolar transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. when handling these devices, care should be exercised to assure that the static charge built in the handler s body capacitance is not discharged through the device. with proper handling and application procedures, however, igbts are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. igbts can be handled safely if the following basic precautions are taken: 1. prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ?ccosorbd ld26?or equivalent. 2. when devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. tips of soldering irons should be grounded. 4. devices should never be inserted into or removed from circuits with power on. 5. gate voltage rating - never exceed the gate-voltage rating of v gem . exceeding the rated v ge can result in permanent damage to the oxide layer in the gate region. 6. gate termination - the gates of these devices are essentially capacitors. circuits that leave the gate open-circuited or floating should be avoided. these conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. gate protection - these devices do not have an internal monolithic zener diode from gate to emitter. if gate protection is required an external zener is recommended. operating frequency information operating frequency information for a typical device (figure 3) is presented as a guide for estimating device performance for a speci? application. other typical frequency vs collector current (i ce ) plots are possible using the information shown for a typical unit in figures 5, 6, 7, 8, 9 and 11. the operating frequency plot (figure 3) of a typical device shows f max1 or f max2 ; whichever is smaller at each point. the information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f max1 is de?ed by f max1 = 0.05/(t d(off)i + t d(on)i ). deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. other de?itions are possible. t d(off)i and t d(on)i are de?ed in figure 20. device turn-off delay can establish an additional frequency limiting condition for an application other than t jm . t d(off)i is important when controlling output ripple under a lightly loaded condition. f max2 is defined by f max2 = (p d - p c )/(e off + e on ). the allowable dissipation (p d ) is defined by p d = (t jm - t c )/r jc . the sum of device switching and conduction losses must not exceed p d . a 50% duty factor was used (figure 3) and the conduction losses (p c ) are approximated by p c =(v ce xi ce )/2. e on and e off are de?ed in the switching waveforms shown in figure 20. e on is the integral of the instantaneous power loss (i ce x v ce ) during turn-on and e off is the integral of the instantaneous power loss (i ce x v ce ) during turn-off. all tail losses are included in the calculation for e off ; i.e., the collector current equals zero (i ce = 0). test circuit and waveforms figure 19. inductive switching test circuit figure 20. switching test waveforms r g = 3 ? l = 1mh v dd = 480v + - HGTG30N60B3D t fi t d(off)i t ri t d(on)i 10% 90% 10% 90% v ce i ce v ge e off e on HGTG30N60B3D eccosorbd ? is a trademark of emerson and cumming, inc.
8 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil semiconductor products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or spec ifications at any time with- out notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is b elieved to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of th ird parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see web site www.intersil.com sales of?e headquarters north america intersil corporation p. o. box 883, mail stop 53-204 melbourne, fl 32902 tel: (321) 724-7000 fax: (321) 724-7240 europe intersil sa mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia intersil ltd. 8f-2, 96, sec. 1, chien-kuo north, taipei, taiwan 104 republic of china tel: 886-2-2515-8508 fax: 886-2-2515-8369 HGTG30N60B3D to-247 3 lead jedec style to-247 plastic package a b b 1 c d e l l 1 r 1 2 e 1 3 1 j 1 s q p back view term. 4 3 e b 2 2 symbol inches millimeters notes min max min max a 0.180 0.190 4.58 4.82 - b 0.046 0.051 1.17 1.29 2, 3 b 1 0.060 0.070 1.53 1.77 1, 2 b 2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 d 0.800 0.820 20.32 20.82 - e 0.605 0.625 15.37 15.87 - e 0.219 typ 5.56 typ 4 e 1 0.438 bsc 11.12 bsc 4 j 1 0.090 0.105 2.29 2.66 5 l 0.620 0.640 15.75 16.25 - l 1 0.145 0.155 3.69 3.93 1 p 0.138 0.144 3.51 3.65 - q 0.210 0.220 5.34 5.58 - r 0.195 0.205 4.96 5.20 - s 0.260 0.270 6.61 6.85 - notes: 1. lead dimension and ?ish uncontrolled in l 1 . 2. lead dimension (without solder). 3. add typically 0.002 inches (0.05mm) for solder coating. 4. position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension d. 5. position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension d. 6. controlling dimension: inch. 7. revision 1 dated 1-93.
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